VBTICTLR

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Interpret as VBTICTLR

VCH0INEN=0, VCH2INEN=0, VCH1INEN=0

VBATT Input Control Register

VCH0INEN	VBATT Wakeup I/O 0 Input Enable 0 (0): VBATWIO0, RTCIC0 inputs disabled 1 (1): VBATWIO0, RTCIC0 inputs enabled.
VCH1INEN	VBATT Wakeup I/O 1 Input Enable 0 (0): VBATWIO1, RTCIC1 inputs disabled 1 (1): VBATWIO1, RTCIC1 inputs enabled.
VCH2INEN	VBATT Wakeup I/O 2 Input Enable 0 (0): VBATWIO2 and RTCIC2 inputs disabled 1 (1): VBATWIO2 and RTCIC2 inputs enabled.
Reserved	These bits are read as 00000. The write value should be 00000.

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